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X86 instructions
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41	On Subnormal Floating Point and Abnormal Timing Marc Andrysco,1 David Kohlbrenner,1 Keaton Mowery,1 Ranjit Jhala, Sorin Lerner, and Hovav Shacham Department of Computer Science and Engineering University of California, S Add to Reading List Source URL: cseweb.ucsd.edu Language: English - Date: 2015-03-30 16:46:44 Software X86 architecture Data types X86 instructions X87 Intel Floating point X86 SIMD Computer architecture Computing Computer arithmetic
42	KCoFI: Complete Control-Flow Integrity for Commodity Operating System Kernels John Criswell, Nathan Dautenhahn, and Vikram Adve Department of Computer Science University of Illinois at Urbana-Champaign Email: {criswell,d Add to Reading List Source URL: sva.cs.illinois.edu Language: English - Date: 2014-03-30 11:43:41 Process Instruction set architectures Interrupt handler Kernel Operating system Thread Interrupt flag INT Ring Computer architecture Interrupts X86 instructions
43	Absoft Increases Fortran Performance With SSE4 on AMD and Intel Windows Systems Rochester Hills, MI., November 5, 2008 – Absoft(R) Corporation today announced Pro Fortran v10.2 which they state provides significant imp Add to Reading List Source URL: www.absoft.com Language: English - Date: 2013-05-29 09:32:55 X86 instructions Instruction set architectures Fortran Advanced Micro Devices X86 SSE4 Multi-core processor 64-bit Intel Fortran Compiler Computing Computer programming Computer architecture
44	PDF Document Add to Reading List Source URL: www.pumpkininc.com Language: English - Date: 2011-09-12 16:03:06 X86 instructions Embedded systems Subroutines Real-time operating system Microcontroller Interrupt handler Interrupt flag Critical section INT Computer architecture Computing Interrupts
45	Variations in Exploit methods between Linux and Windows David Litchfieldth July 2003 This paper will examine the differences and commonality in the way a vulnerability common to both Windows a Add to Reading List Source URL: www.blackhat.com Language: English - Date: 2015-05-28 15:51:39 Software bugs X86 architecture Computer programming Assembly languages Computer errors MOV Buffer overflow Shellcode Stack buffer overflow Computing X86 instructions Software engineering
46	Live Range Hole Allocation in Dynamic Binary Translation Wesley Attrot Daniel Nic´acio Add to Reading List Source URL: amas-bt.ece.utexas.edu Language: English - Date: 1980-01-01 01:00:00 Computing Assembly languages MOV Transmeta X86 Hooking JMP High Level Assembly CPUID Computer architecture X86 architecture X86 instructions
47	Implementation and Evaluation of the Complex Streamed Instruction Set Ben Juurlink Dmitri Tcheressiz Add to Reading List Source URL: research.ac.upc.edu Language: English - Date: 2002-03-20 08:47:55 Central processing unit X86 instructions Parallel computing Instruction set architectures SIMD Streaming SIMD Extensions Instruction set AltiVec UltraSPARC Computer architecture Computing Computer hardware
48	Classic algorithms for Pairwise Testing Andreas Rothmann Hochschule Offenburg November 2008 Add to Reading List Source URL: www.verifysoft.com Language: English - Date: 2011-01-03 03:00:48 Statistics Electronic engineering Scattering parameters Decision theory Electronics X86 instructions Non-standard RAID levels Potentially all pairwise rankings of all possible alternatives Design of experiments Orthogonal array testing Survival analysis
49	2011 12th International Workshop on Microprocessor Test and Verification Automatic generation of software-based functional failing test for speed debug and on-silicon timing verification E. Sanchez , G. Squillero , A. Add to Reading List Source URL: www.genetic-programming.org Language: English - Date: 2012-06-28 00:31:22 X86 instructions Parallel computing IBM PC compatibles MOV Celeron Nehalem Intel Core Multi-core processor Overclocking Computer architecture Computing Computer hardware
50	IA-32 Intel® Architecture Software Developer’s Manual Volume 1: Basic Architecture Add to Reading List Source URL: www.ssw.uni-linz.ac.at Language: English - Date: 2004-02-11 09:32:53 X86 architecture Parallel computing Central processing unit SSE2 Streaming SIMD Extensions MMX X87 X86 SIMD Computer architecture Computing X86 instructions